The power of using a soft core on a FPGA comes from using this soft core in conjunction with custom hardware sitting alongside it on the same device. You would be better off spending a lot less money on buying a dedicated microcontroller that can do the same thing and that would no doubt be simpler to develop a power distribution network for and subsequent layout on a pcb. Using up all the resources that an FPGA has to offer to implement a soft core is not the best way of gaining access to a microcontroller. One of the limitations that we will be looking at overcoming is the limited memory available, especially on some of the smaller models for storing application code. Today we will go step-by-step to create the harware and firmware to load your application from SPI Flash into DDR memory with a MicroBlaze SREC SPI bootloader.įPGA’s are immensely flexible devices, and although they are capable of running soft core processors this was not the primary motivator behind their development and as such we have to work around some of the limitations they present in this area.
Part 2 of this tutorial can be found HERE Generate the bitstream and export hardware.
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